normalized
overflow condition
overflow
parity bit
point representation
positive number
self complementing
signed numbers
substraction method
traction
unsigned number substraction
radix
random access memory
read only memory
serial input
shift operation
shift registers
write and read operation
small scale integration
state diagram
transistor logic

control unit
fetch and decode
instruction cycle
instruction type
logic operation memory
memory reference
memory word
reference register
subdivide
timing signals
flip flop
full adder
half adder
de morgan theorem

NAND
design combinational
digital circuit
digital computers
dont care

NAND gate
exclusive or
inverter
logic diagram

master slave
map function

hexadecimal

data selector

computer architecture