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Cadenti
logic family
medium scale integration
metal oxide semiconductor
ac register
accumulator logic
adder circuit
basic computer design
branch unconditionally
flowchart
input and output communication
input output instruction
input register
interrupt cycle
logic adder circuits
logic gates
output register
register and memory
binary code
binary number
clock pulse
data types
decimal numbers
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Decoders
Discrete quantities of information are represented in digital computers with binary codes. A binary code of n bits is capable of representing up to 2" distinct elements of the coded information. A decoder is a combinational circuit that converts binary information from the n coded inputs to a maximum of 2" unique outputs. If the n-bit coded information has unused bit combinations, the decoder may have less than 2° outputs.
The decoders presented in this section are called n-to-m-line decoders, where m<_ 2". Their purpose is to generate the 2n (or fewer) binary combinations of the n input variables. A decoder has n inputs and m outputs and is also referred to as an n x m decoder.
Figure 2-1

The logic diagram of a 3-to-8-line decoder is shown in Fig. 2-1. The three data inputs, A0, A1, and A2, are decoded into eight outputs, each output representing one of the combinations of the three binary input variables. The three inverters provide the complement of the inputs, and each of the eight AND gates generates one of the binary combination. A particular application of this decoder is a binary-to-octal conversion. The input variables represent a binary number and the outputs represent the eight digits of the octal number system. However, a 3-to-8-line decoder can be used for decoding any 3-bit code to provide eight outputs, one for each combination of the binary code.