• Cadenti
  logic family
  medium scale integration
  metal oxide semiconductor
  ac register
  accumulator logic
  adder circuit
  basic computer design
  branch unconditionally
  flowchart
  input and output communication
  input output instruction
  input register
  interrupt cycle
  logic adder circuits
  logic gates
  output register
  register and memory
  binary code
  binary number
  clock pulse
  data types
  decimal numbers
  

Global Business Resources
Find out worldwide manufacturers and traders.
Discover best resources in global-business-resource.com.
business services.

---

Input register

The input register INPR consists of eight bits and holds an alphanumeric input information. The 1-bit input flag FGI is a control flip-flop. The flag bit is set to 1 when new information is available in the input device and is cleared to 0 when the information is accepted by the computer. The flag is needed to synchronize the timing rate difference between the input device and the computer. The process of information transfer is as follows. Initially, the input flag FGI is cleared to 0. When a key is struck in the keyboard, an 8-bit alphanumeric code is shifted into INPR and the input flag FGI is set to 1. As long as the flag is set, the information in INPR cannot be changed by striking another key. The computer checks the flag bit; if it is 1, the information from INPR is transferred in parallel into AC and FGI is cleared to 0. Once the flag is cleared, new information can be shifted into INPR by striking another key.

---