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Cadenti
logic family
medium scale integration
metal oxide semiconductor
ac register
accumulator logic
adder circuit
basic computer design
branch unconditionally
flowchart
input and output communication
input output instruction
input register
interrupt cycle
logic adder circuits
logic gates
output register
register and memory
binary code
binary number
clock pulse
data types
decimal numbers
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Control Logic Gates
Control unit
Figure 5-6

The block diagram of the control logic gates is shown in Fig. 5-6. The inputs to this circuit come from the two decoders, the / flip-flop, and bits 0 through 11 of IR. The other inputs to the control logic are: AC bits 0 through 15 to check if AC = 0 and to detect the sign bit in AC(15); DR bits 0 through 15 to check if DR = 0; and the values of the seven flip-flops. The outputs of the control logic circuit are:
1. Signals to control the inputs of the nine registers
2. Signals to control the read and write inputs of memory
3. Signals to set, clear, or complement the flip-flops
4. Signals for S2, Slr and So to select a register for the bus
5. Signals to control the AC adder and logic circuit
The specifications for the various control signals can be obtained directly from the list of register transfer statements in Table 5-6.