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Register load

The transfer of new information into a register is referred to as loading the register. If all the bits of the register are loaded simultaneously with a common clock pulse transition, we say that the loading is done in parallel. A clock transition applied to the C inputs of the register of Fig. 2-6 will load all four inputs Io through 13 in parallel. In this configuration, the clock must be inhibited from the circuit if the content of the register must be left unchanged.

Figure 2-6

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